Sujet Waldorf en faillite

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En revanche, avec des optimisations, le DSP aurait réussi - d'ailleurs, ne mélange pas DSP et ARM stp, c'est PAS DU TOUT la même chose -

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De plus, les compilateurs fournis permettent de se passer de l'assembleur, tout peut être fait en C ou C++ avec peu d'overhead.

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Donc les libs de PC sont utilisables...

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RISC, c'est pas pour rendre les puces plus simples, au contraire, dès le départ avec le séquenceur câblé, au savait que c'était plus compliqué

Citation : Tiens, je veux bien voir tes exemples de codage

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#include <iostream>
#include <math.h>

#include "cycle.h"

inline void f1(const float* lx, const float* ly,
float* lz, const int size)
{
int i = 0;

for (i = 0; i < size; ++i)
{
lz[i] += lx[i] * ly[i];
}
}

void app_hann(float* &h ,unsigned int N)
{
if ( N < 1 )
{
std::cerr << "N must be equal or greater than 1n";
exit(1);
}

// Initialisation :
// - s : is for sin calculation
// - c : c is for cos.
//
// Last and curr var are used to compute sin and cos ( cf Numerical
// recipes in C, chap 5.5. )

float s_last = 0;
float s_curr = 0;
float c_last = 1.0;
float c_curr = 0;
float alpha = 0.1;
float beta = 0.2;
float delta = 3.14159/N;

//alpha = 2*(sin(delta)*sin(delta));
//beta = sin(2*delta);

//h = new float[N];
h[0] = 0;

for ( int loop = 1 ; loop < N ; ++loop)
{
// First the alpha*cos(teta)+beta*sin(teta) is computed
// This operation MUST be done at the begining.

c_curr = (-1) * alpha * c_last + (-1) * beta * s_last;
s_curr = (-1) * alpha * s_last + beta * c_last;

// computation of the actual windows coefficients

c_curr += c_last;
s_curr += s_last;

h[loop] = 0.5-0.5*c_curr;

// New values of c_last and s_last

c_last = c_curr;
s_last = s_curr;
}
}

int main()
{
ticks t0, t1;

float *x, *y, *z;
const int N = 1024;
const int Nloop = 16;

x = new float[N];
y = new float[N];
z = new float[N];

double result;

for (int loop = 0; loop < N; ++loop)
{
// convert to float to have float division instead of
// euclidian division !
x[loop] = (float)loop/N;
y[loop] = -(float)loop/N;
}

// f1, pass 1
t0 = getticks();

for (int loop = 0; loop < Nloop; ++loop)
{
f1(x, y, z, N);
}

t1 = getticks();

double result1 = elapsed(t1, t0);

std::cout << "ticks for f1, pass 1 is around : " << result1/Nloop << std::endl;

// f2, pass 1
t0 = getticks();

for (int loop = 0; loop < Nloop; ++loop)
{
//N * 8
app_hann( z, N);
}

t1 = getticks();

double result2 = elapsed(t1, t0);

std::cout << "ticks for f2, pass 1 is around : " << result2/Nloop << std::endl;
std::cout << "For this number of cycles, there is : n"
<< N*8 << " muln"
<< N*6 << " addn"
<< N*7 << " assignementsn";

delete[] x;
delete[] y;
delete[] z;

return 0;
}

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ticks for f1, pass 1 is around : 4302.5
ticks for f2, pass 1 is around : 26105
For this number of cycles, there is :
8192 mul
6144 add
7168 assignements

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Parlons de l'x86. Tous les vrais programmeurs lui tapent dessus.

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In a discussion on the merits of various processors, Torvalds wrote that Intel had made the same mistakes "that everybody else did 15 years ago" when RISC architecture was first appearing. Itanium tries to introduce an architecture that is clean and technically pure, something that just doesn't seem to work in the real world. He claims that Intel "threw out all the good parts of the x86 because people thought those parts were ugly. They aren't ugly, they're the 'charming oddity' that makes it do well."

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Clever architecture is something that has trapped others in the past. The Alpha processor team spent years learning that many of the architecturally correct ideals they had held needed to be thrown out when it came to the real world. According to Torvalds, "And all the RISC stuff that tried to avoid it was just a BIG WASTE OF TIME. Because the _only_ thing the RISC approach ended up showing was that eventually you have to do the hard stuff anyway, so you might as well design for doing it in the first place."

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Le RISC, c'est pas un proc, simple, c'est un jeu d'instructions simplifiées...